Spectrofon #14: System: Compatibility Insights and Modifications

┌──────────────────────────────┐
│ ───────── SYSTEM ─────────── │
└──────────────────────────────┘

Gromov Kirill (CHUNG Software).

It so happened that my actually "rough" version of the article ended up published in "ZX-REVUE" N3 1995, probably causing justified remarks like: "What fool wrote this?". The reason for this is my laziness, because in fact, the finished, verified, and corrected version of the article was ready by 06.05.1995. Well, what can I do! I will make amends later...

FORUM ON ETERNAL QUESTIONS OF COMPATIBILITY AND THE COMPUTERS WE CHOOSE.

I was prompted to take on this topic by numerous port #FF and INT schemes that are still being served to readers on the pages of "ZX-REVUE".

A lyrical digression: once, while leafing through a fresh "REVUE" and stumbling upon a section dedicated to "compatibility of the ATM TURBO computer," ALEXEY (FFC) said: "Why compatibility?! It would be much more correct to write: 'ABOUT THE INCOMPATIBILITY of the ATM TURBO computer!!!'".

From the moment I acquired all the issues of "ZX-REVUE," I have followed with undisguised interest the sections where this topic was raised. At some point, I suddenly noticed that instead of exhaustive answers to already tired questions, a wave of murky confusion was rising. This prompted me to take on the heavy burden of the primary defender. Everything I write has been verified by me in practice on three models of computers - "PROFI+", "PENTAGON 128," "DELTA-S" (Old "MOSCOW"). So:

PORT #FF

Axiom: When reading from ANY unused port, ATTRIBUTES are read alternately with the number 255 (A detailed description of its operation can be found in old issues of REVUE). It should be noted right away that this applies to ZX-SPECTRUM 48k; as I was informed, in the SPECTRUM 128 from SINCLAIR RESEARCH LTD (!) port #FF is also present, but its operation is somewhat different from what I have seen and describe. It turns out that since SPECCY was produced not only by S.R.L but also by AMSTRAD, their schematics have somewhat different solutions. The production company of the computer can be read on the ULA schematic. This information was provided to me by ALEXEY (FFC COMP.), and since I haven't seen it myself, I can only repeat it. It is only clear that apparently because of this, rumors about "chaotic values with predominantly the attribute of the current cursor position" read from this actually not a port are circulating. My goal was to ensure that programs using this port for their synchronization ran well, plus that it was as simple as possible in implementation and as close as possible to the original source - ZX-SPECTRUM 48k.

Correct solution: Almost every discrete logic computer schematic can find in the video controller node a register responsible for outputting raster attributes to the output stage multiplexers of the video controller. This is DD56, DD63 in "DELTA"; DD37, DD40 in "PENTAGON 128"; in "PROFI+" DD59 v4.01, DD63 v5.03. In "DELTA," it is enough to connect the outputs 2,7,10,15 of the aforementioned chips to the data bus through resistors 820 - 1.5k and forget about all problems. This is somewhat more accurate than what is stated on the pages of REVUE about the implementation of port #FF in computers with separate memory fields. But more often the register (RG ATTR) in question has its input OE connected to "ground," thus constantly outputting information to the multiplexers. In schematics with a normal timing diagram ("PROFI"), we do the following: cut OE RG ATTR from "ground," and bring it to the POLE ATTR signal (not FLD2 in "PROFI," C5 in "PENTAGON 128"). After that, we connect its outputs (I1-I8 in "PROFI") to the data bus through 820-ohm resistors. Sometimes it happens that after this, undesirable effects may appear on the screen, such as a thin flickering line on the left side of the screen in "PENTAGON 128."

Then it is better to install an additional register in such schematics according to the above rules, with its inputs connected to the inputs of RG ATTR, OE to POLE ATTR, and outputs through resistors to the data bus. As you can see, the approach is quite universal and in practice most accurately replicates the approach in the branded machine. Just as on the branded "SPECCY," ARCANOID 1, F.I.R.E., etc., run.

"Glitchy" implementations encountered:

1. The port is implemented as a port with address decoding #FF + not RD + not IORQ.
a) Firstly, attributes will not be read from ANY unused address.
b) If there is no clocking from the POLE ATTR signal, then ARCANOID 1 will not work at all.
c) Due to the shifted timing diagram, the operation of programs will be impaired (twitching and clicks in ARCANOID 1).

2. Attributes are taken from wherever (for example, from the RAM buffer register).
Maybe with all other rules followed, the port will work, but the attributes themselves seem to be absent, and this is no longer like in the branded "SPECTRUM," but rather like in Rodionov's book - "chaotic values"... (Where did he get them from? I don't understand...)

And one more indispensable condition: the presence of 10k resistors "pulling" the data bus to +5V and (possibly) the correct position and duration of the INT. This would probably not hurt any computer, even without port #FF.

┌──┬──┬──┐ R1
AT0 ─┤D0│RG│Q0├──══─ D0
AT1 ─┤D1│ │Q1├──══─ D1
AT2 ─┤D2│ │Q2├──══─ D2
AT3 ─┤D3│ │Q3├──══─ D3
AT4 ─┤D4│ │Q4├──══─ D4
AT5 ─┤D5│ │Q5├──══─ D5
AT6 ─┤D6│ │Q6├──══─ D6
AT7 ─┤D7│ │Q7├──══─ D7
├──┤ │ │ R8
CLC RG ATTR ─/ C│ │ │
├──┤ │ │
POLE ATTR ─oOE│ │ │
└──┴──┴──┘

RG - 555/1533 IR23 R1-R8 820 ohm
I think comments on the schematic are unnecessary. I will only note that all the "salt" is in the "selection" of the chip with the POLE ATTR signal and connecting its outputs to the data bus using a "mounting or." This ensures that the chip does not "clutter" the data bus in the interrupt acknowledgment cycle and does not create conflicts during access to other ports of the computer.

The schematic will definitely be useful for owners of "PENTAGON 128." It is convenient to solder the additional register on top of D40, naturally not soldering outputs Q1-Q7 and pin 1 (input OE).

I hope that "finding" the attribute register and control signals, as well as applying the advice on installing the port as in the "PROFI" schematic or installing an additional register (depends on your computer's schematic, an additional register is needed in "PENTAGON 128") will not pose special difficulties for you; otherwise, it's better to entrust this honorable and necessary task to someone else.

INT SIGNAL

Axiom: The INT signal is generated on the trailing edge of the frame sync pulse and has a duration of 9 µs.

ATTENTION! Measurement results conducted on the branded "SPECTRUM 48k" showed that the duration of the INT is 9 µs, and its position is at the beginning of the frame sync pulse.

Schematic implementations usually have two approaches: pulse formation using hard logic, formation using a differentiating RC circuit. Both approaches are well covered on the pages of REVUE. It can only be added that in the first case, the chip AG3 can be used, although for some reason a flip-flop is installed, clocked from the "frame sync pulse" signal and "clipping" the signal through the R input with pulses of 9 µs period taken from counters/dividers in the clock generator node.

In the second case, the duration is roughly selected by the capacitor and accurately "fine-tuned" by the resistor. In both cases, the INT signal can be slightly shifted by connecting the capacitor with one leg to "ground" and the other to the INT input of the processor. An important point is the fact that for some reason the main indicator of the "correctness" of the INT is considered to be the position of border stripes in some games like: VENOM STRICKES BACK, ACADEMY, MONTECARLO CASINO, etc. It should be noted that the "ideal" position of the stripes will be observed only on machines with separate memory fields, due to the reasons of the display controller's schematic implementation. In my practice, only on the "Delta-S" computer with a "corrected" INT did all the above-mentioned programs run perfectly. Adjusting the INT signal on other computers with shared memory led to the result of "the nose was pulled out - the tail got stuck," that is, if adjusted by the stripes on top, the stripes on the bottom shifted, and vice versa. And in "PROFI," the creators of the latest version of the board went the route of maximizing performance, practically minimizing the number of WAITs from ULA to the processor. What to say, even on the branded 128, the behavior of the above-mentioned programs differs (which, by the way, was mentioned on the pages of REVUE). Therefore, I consider the criterion of "correctness" of the INT to be the absence of sprite shaking in ARCANOID 2 and the absence of "disappearing" letters in CHASE H.Q. 1 and SHOCK MEGADEMO, as well as the stable operation of the computer's keyboard. In this case, the INT of "PROFI" should be considered quite acceptable.

In computers where the "TURBO" mode is implemented, the INT should be "damped" using the M1 and IORQ signals so that due to the excessive length of the original INT, there is no "re-capture" of it in turbo mode. I don't know if this is good or bad, but the "dynamic" INT looks quite puzzling on the oscilloscope...

To my great regret, this topic cannot be considered closed today, but it can be considered sufficiently clarified.

P.S. Those who are kept awake by the compatibility (or rather, incompatibility) of their computer can ring me, and I will download a whole disk of "sneaky" programs for the suffering one, which can be used to judge the degree of (in)compatibility of the computer.

Now we can smoothly transition to the review of

COMPUTERS WE CHOOSE

Here, the situation is perhaps more disheartening than ever. An abundance of schematics, a bunch of peripherals, and a sea of "glitches" in each of them. There is a very interesting approach that ALEXEY (FFC COMP.) demonstrated to me:

If you cannot afford to buy a branded computer, take "LENINGRAD," redo the entire port decoding scheme, connect 128kb of RAM to it, assemble and connect the BETA-DISK controller without PLL and other frills with TR-DOS version 5.03. Oh yes, correct the INT and install the "Rodionov" port #FF. Then, among the sea of wires, there will be something, although it should be said, very accurately resembling the branded SPECTRUM 128. But ARCANOID 1 will still not run on it. In other cases, look at how much memory you will have (128 - 1024 kb), what additional features our generous schematics will gift you in the form of super-rasters and extra service monitors.

But do not forget to pay attention to one small detail: does your computer have such a small button that turns everything off. If it doesn't, you are unfortunately out of luck: due to the terrible unwillingness of domestic programmers to fully specify address #7FFD when working with RAM/ROM pages, your computer will present you with many "surprises" starting from a stubborn refusal to run STS2.6 and ending with self-formatting disks. A huge thank you to the "KONDOR" company for our happy button! It bears the proud name ON/OFF in the "PROFI" schematic and allows launching 99% of hacker exploits and "loaders." Perhaps it will also appear in "SCORPION," and then its owners will not painfully regret the money spent in vain. A good example was almost presented to the world by the company "SLOT," almost, because further than the printed circuit board and the album of schematics, it seems, nothing went. To date, the most "finished" computer with working peripherals and a decent appearance is "PROFI+ v4.01" from "KONDOR." Although it still has room for improvements from the series of "not much, but nice," like a correct port #FF, and other little things that concern Sinclairists - enthusiasts of soldering. So, if you wish, you can learn to repair radios, televisions, and other household appliances in the process of steadily increasing the compatibility of your computer, which will undoubtedly be very useful to you in the future.

Once on the screens of "SPECTROFON," there was a request from one uncle to tell him the story

ABOUT "PROFI" and "KONDOR"

ATTENTION! Everything said above/below refers to "PROFI v4.01," buying version 5 of "PROFI," I was simply horrified by this nightmarish creation! How can one ruin a good schematic in such a short time?! Until I fix the "glitches" of this defective creation, please do not use indecent words!

As a frequent guest of this establishment, I can tell many interesting things. "PROFI" is, in general, a decent machine. It has many advantages.

Normal INT, 512-1024K RAM, expanded video raster, a bunch of various peripherals, a "clickable" hardware expansion port (very relevant for "SCORPION" users), and much more. And most importantly, all of this exists and works unlike promises like "it will be..." for "SCORPION" and the unassembled board with glitches and issues of the supercomputer "ZXHA NESH."

But, as with everything in the post-Soviet space, there are unimaginable idiocies here too. Strange people at "KONDOR" apparently aimed to make "PROFI" ultimately the most incompatible computer even with its previous models.

And to my timid attempts to at least describe the improvements of the computer for more complete compatibility with the SPECTRUM, they loudly respond: "Why do we even need 'Sinclair'?! We have a cool orientation towards CP/M!!!". Although even a fool can understand that "PROFI" is purchased as a good and powerful "SPECTRUM," not as a pathetic "PC," as the employees of "KONDOR" would like. And pathetic software with such capabilities is truly sacrilege! Prices, although generally not higher than "SCORPION's," are not always clear to me, like, for example, charging 20 thousand for "TURBO MODE 8MHz," consisting of 1 KP11 and two small capacitors.

In general, I won't throw dirt in my own garden; I will rather engage in consulting unfortunate "users" regarding improvements and operation of their decent machines, since the company does not conduct consultations regarding improvements related to the "SPECTRUM" mode at all.

If only a small fraction of programmers who own "PROFI" would stop bashing pathetic CP/M toys and CP/M itself, and start writing SYSTEM PROGRAMS (and not the idiotic drivel in BASIC or PASCAL), then I think "PROFI" would be beyond any competition.

P.S. I just recently learned how well the port #FF is made in "SCORPION"! The CDOS modem does not get along with it.

This once again added fuel to the fire of our eternal disputes with ALEXEY (FFC) and caused a new explosion of swearing. Apparently, this will continue for a long time, and for now, if you want everything to work for you, follow my advice.

RESULTS OF RESEARCH ON PROBLEMS RELATED TO TURBOCHARGING VG-93

Having spent a lot of time searching for information and practical research on this topic, I hasten to share the results.

Let it be known that the clock frequency of 2 MHz is intended for operation with a GD of 203 mm in diameter. Moreover, if during work with a GD of 133 mm in diameter during READ operations everything seems to be okay, then during WRITE it is a different story. Without going into detailed specifics, I will say that it is possible in principle to change the delay codes in the TR-DOS firmware, adjusting them for the clock frequency of VG 2 MHz; this will allow for minimal modification of the controller, but if the drive cannot handle the STEP with the increased frequency, it will be necessary to revert everything back, including the old firmware. From my experience, I was not very pleased with "turbocharging" the "brake" or as it is also called "the fifth Armenian" drive; it buzzed briskly, but made some errors...

The next point: hardware modifications. The basic turbocharging schematic has a very serious drawback described in "S"N12.

Let's delve into it further: the frequency "jumps" in sync with the WSTB write strobe, causing distortions in the service information on the disk. Introducing the trigger scheme described in "S"N12 gives a half-hearted result: there is still a probability of distortion of information during the first front of the write strobe. This "probability" led to the failure of two disks within an hour of intensive experiments. And the WF/DE signal practically plays no role in practice; check it yourself. The way out of this situation is very simple (suggested to me by MIKHAIL KHOHKLOV, a circuit engineer at "KONDOR"), you need to switch the VG to "normal" frequency BEFORE the write strobe, not during it.

In this case, the strobe will be perfectly performed by the DRQ signal (pin 38 of VG93) which should be connected to the sync input of TM2 instead of WSTB. Then you will have no problems with disks.

In general, I became interested in this problem while reading the "SPECTROFON" magazine. Initially, I assembled the first scheme - it ruined disks; then the second - fewer disks got ruined, but as you know, it's better to do nothing than to do poorly. I had to take it upon myself to study this issue. It was then that I discovered that the VG should be switched from increased frequency to normal NOT DURING the write strobe, as the authors of the letters do, but BEFORE THE WRITE STROBE.

Why I chose the DRQ signal: the signal is generated when requesting a byte of data for writing for the first time, then the VG calculates the service information, after which the DRQ signal is generated for the second time. Only after that is the write strobe issued to the drive. Although in my scheme, the switching will occur already at the first DRQ signal. I tried to make it so that I wouldn't have to redesign many "old" turbocharging schemes, and I achieved this. Owners of the "old" turbocharging scheme with the TM2 trigger need only apply the DRQ signal to its input C instead of the WSTB signal. After this, you can confidently guarantee the normal operation of the scheme. Owners (?) of ZX-NEXT, I think, should do the same in their controller. Below I provide the corrected scheme:

2 MHz ────────────┐
1 MHz ───────────┐│
____ ┌─┬──┬─┐││┌───┬──┬─┐
STEP ───oS│ T│ ││└┤1.0│MS│Z│
├─┤ │Q├└─┤1.1│ │ │
┌─┤D│ │ │ ┤2.0│ │1├─CLC
▀▀▀│ │ │ │ ┤2.1│ │ │ VG
DRQ ───/C│ │▄│ ┤3.0│ │2├
├─┤ │Q├┐ ┤3.1│ │ │
WF/DE─0─oR│ │ ││ ┤4.0│ │3├
│ └─┴──┴─┘│ ┤4.1│ │ │
+5V ┐║ DD1 │ ├───┤ │4├
│║ R1 └─┤ SE│ │ │
││ ├───┤ │ │
└┘ ┌─o EZ│ │ │
│ └───┴──┴─┘
│ DD2
▀▀▀

DD1 - 555/1533 TM2
DD2 - 555/1533 KP11A
DRQ - 38 pin VG93
R1 - 10k ohm
WF/DE - 33 pin VG93
CLC - 24 pin VG93
____
STEP - taken from the drive connector of the computer.

By the way, instead of KP11A, another multiplexer can be used, for example, KP12, of course, taking into account its connection.

I dare to say that instead of TM2, it is quite possible to manage with LE1, organizing an asynchronous RS trigger on it with direct control inputs and priority in the scheme by the input from the DRQ signal:

STEP ┌────┐
(15 pin VG93) 1│ 1 │
────────────┤ │3
2│ O─┐
┌┤ │ │
││ │ │
│└────┘ │
┌┼───────┘
│└───────┐
│ ┌────┐ │
│4│ 1 │ │ "1" - 2 MHz
DRQ └─┤ │6│ "0" - 1 MHz
(38 pin VG93) 5│ O─0───────────>
────────────┤ │ to the switch
│ │
└────┘

P.S. I advise owners of "SCORPIONs" and "ZX-NEXTs" (if there are any?) to revise their VG93 turbocharging schemes by simply moving one wire from WSTB to DRQ.

And I hasten to say that I have not tested the scheme with LE1, but I think it is operational.

It is very amusing to read lines about how people achieve "compatibility" of their computers with warehouse elites and STS using jumpers in the "MS-5313" drive. In such cases, a book with technical descriptions of the drive is opened, where information about its jumpers and what they do is gleaned. The creators of the drive controller in our country somehow "ignored" the "DRIVE READY" signal output to the drive's interface connector, resulting in the drive's nonsensical behavior later on. Correctly: how, excuse me, will it write or read if it is not ready yet, and the VG does not know about it? Thus, only by selecting the switching of the "DRIVE READY" and "HEAD PRESSURE" signals can the floppy and programs be "friends." And in general, the description of the "mysteries" of the drive's operation and their solutions is an entire epic, consisting of 50% of the soulful turns of Russian national folklore. One of such charming mysteries is the ability to "erase" information on sealed disks. A piece of news almost on the verge of fantasy: THE CONTROLLER WRITES INFORMATION ON A SEALED DISK!!! On a well-sealed "silver" one... Although more precisely, it does not write but spoils.

It turns out this is not the nonsense of an inflamed brain, but an objective reality.

Let me suggest how to do this: standing on one track (for quick effect) ignoring the "WRITE PROTECTION" signal, stoically "pull" the "WSTB" signal as often as possible.

After some time, your disk will tell you "Tsu-Tsu" (if fate has rewarded you with an excellent drive and a brilliant controller). Evil boys have probably already started writing a new "megademo" with the spoiling of a sealed disk simultaneously with sending unnecessary greetings. And those who do not want to become victims of the inquisitive hackers, please read on.

I explain scientifically: it turns out, regardless of the input signal of WRITE PROTECTION, VG93 gives a write strobe to the drive. The latter will jerk, thank goodness the scheme is not perfect even with TEAC, and will issue a WRITE PROTECTION signal to the same VG. However, at the same time, it still sends a weak and short erasure pulse.

Now imagine that some clever person starts to jerk the write strobe on one track (and even worse on one sector) with a certain frequency and periodicity. The information will collapse sooner or later. In the same way, records on audio cassettes "fly" during playback on players from incomprehensible Taiwanese firms.

But how unlucky cassettes are, how lucky we are! We need just one "AND" element and some skills with a soldering iron:

(cut)
WSTB 30 pin VG93 ────0───X──0─────
│ │
│ ┌──┐ │
└─┤ &│ │
____ │ ├─┘
WPRT 36 pin VG93 ──────┤ │
└──┘
DD1 - 555/1533 LE1
Only after you assemble this scheme can you sleep peacefully, not fearing that some bad boy will maliciously abuse your sealed magnetic carrier, taking advantage of the shortcomings of the drive's schematics.

COMPUTER POEM

"Instruction for #FDchildren"

Little children!
Never in the world,
To port #FD should you
Send numbers,
From such tricks,
Little kids,
Many computers
Like to hang!
What is so hard for you?
Just a couple of buttons,
In the extra byte address
Fully specify,
For with a kind word,
And not dirty curses,
Your name people
Will remember!

The full address of the configuration port of the ZX-SPECTRUM 128 computer is #7FFD, #7FFD, #7FFD, #7FFD !!!!

I sincerely hope that my epoch-making work will not go unnoticed.

And one more thing: I really need information from primary sources on AY-3-8910(12) or analogs (YM2149F)! Moreover, this should be information more of a schematic nature. CHUNG Software, Moscow
Gromov Kirill (C) CHUNG Software
tel. 397-65-08

Contents of the publication: Spectrofon #14

  • Expertise - Алексей Литвинов, Андрей Бусыгин
    Analysis and Russian adaptation of the game 'Academy' by CRL Group, highlighting significant program modifications and the addition of a new game ending.
  • Archive - Андрей Школьников
    Analysis of the game Archon, its appeal, mechanics, and strategic elements. Detailed exploration of its characters and their battle properties. Overview of magical spells and game tactics.
  • Debut - Андрей Школьников
    Analysis of the game 'Emerald Isle' by Level 9, contrasting linear and global adventures. Describes gameplay, puzzles, and strategy for success. Concludes with tips for navigating challenges.
  • Overview
    Overview of new games on Moscow's radio market, including 'Star Legacy' with its full release, 'UFO: Enemy Unknown' conversion, and others.
  • From World to Bit
    This article provides guidance for several ZX Spectrum games, including tips for overcoming challenges and critiques on the influence of games on players.
  • Championship - Matthias
    The article covers the Open Virus Championship, detailing the selection cycle, changes in rules, and highlights of the matches. Participants from different cities and countries competed with their virus programs. Key winners have been determined for the Final League.
  • System - Chung Software
    Analysis of compatibility issues in ZX Spectrum models like ATM Turbo and others, detailing solutions for port #FF and INT signal. Emphasis on practical adjustments for various models, ensuring optimal compatibility with original ZX Spectrum 48k. Critical examination of DIY computer upgrades and potential issues with software compatibility.
  • Premiere
    Review of two software tools: Pro Sound Maker, a music editor by Denis Dratov, featuring solutions to technical challenges, and Visual Decompressor v1.2 by Timothy, offering visual effects during decompression.
  • Advertisement
    Advertisement of Spectrofon magazine, offering licenses and calls for collaboration. Contact details for buying games and software. Studio Logros promotes Russian programmers.